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Prasad, A. M.
- FPGA based Implementation of Low Area and Power 16-bit Multiplier-Accumulator using Bypass Technique with SPST Adder using Verilog
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1 Department of ECE, Sri Vasavi Engineering College, Pedatadepalli, Tadepalligudem,, IN
2 Gudlavalleru Engineering College, Gudlavalleru, IN
3 JNTUK, Kakinada, IN
1 Department of ECE, Sri Vasavi Engineering College, Pedatadepalli, Tadepalligudem,, IN
2 Gudlavalleru Engineering College, Gudlavalleru, IN
3 JNTUK, Kakinada, IN