Reversible Logic Implementation for Fused Radix-2 FFT Unit

T Optimum use of energy is the fundamental parameter to enhance the effeciency in a signal processing unit. Fast Fourier Transform (FFT) algorithm improves the effecient use of the energy in the digital signal processing unit. Added to that, radix-2 FFT algorithm is an effective module to decrement the number of hardwares used. In this paper, the FFT algorithm is implemented for the 54 bit input data. Reversible logic gate that provides low latency and zero loss of information is used in the manipulation of the discrete FFT algorithm. Adding an essence to this module, the use of the modus operndi of operand decomposition in the functioning of addition and multiplication leads to the reduction in the switching activity and thereby reduces the power dissipaiton. The Dot Product unit and the Add and Subtract unit are to be realized, for the genertion of the discrete and fused radix-2 FFT. Output is simulated by the simulator called as 'Modelsim' and is synthesized by the 'Xilinx' synthesizer. The comparative discussion for both discrete and fused radix-2 FFT units is provided.