Analysis of Software Based Self Test Methods for RISC Processor Core

In an Systems-on-Chip(SoC) design, a large number of complex arithmetic and logic functional modules are deeply embedded in datapaths of embedded processor cores which are further embedded in the overall SoC. Due to this design style, embedded processor cores have significant testability problems. Software-Based Self-Test(SBST) is a nonintrusive testing approach and provides at-speed testing capability without any hardware or performance overheads. Embedded processor testing techniques based 5on the execution of self-test programs have been recently proposed as an effective alternative to classic external tester-based testing and pure hardware Built-in Self-Test (BIST) approaches. A deterministic software-based self-testing methodology for processor cores is introduced that efficiently tests the processor datapath modules without any modification of the processor structure. By moving test related functions from external resources to the SoC’s interior, in the form of test programs that the on-chip processor executes, SBST significantly reduces the need for high-cost, big-iron testers, and enables high-quality at-speed testing and performance binning. To demonstrate the advantage of using SBST in at-speed functional testing, SBST framework was developed and applies it to an open source microprocessor core, named OpenRISC 1200. Software-based self-test was originally proposed for cost reduction in SoC test environment.