A Novel Architecture for Multiple Modulations on an FPGA Based Digital Modulator

In this paper, a new FPGA based Digital Modulator with multiple modulation capabilities is proposed. The paper mainly focuses on enhancing the existing DDS architecture with a minimum hardware to provide a single unit solution for supporting different modulation schemes. In DDS, the size of the ROM look up is reduced by using the ROM compression algorithm which saves a lot of area in FPGA. The Design meets the present Software Define Radio (SDR)requirements and avoids the user to have an individual modulator for each modulation scheme. It provides an ideal and low cost solution,facilitating the user selection for desired modulation technique to be used. The VHDL programming language is used for modeling the design modules. The design is simulated in the ModelSim Simulation Tool and Synthesized using the Xilinx ISE Synthesis Tool. The architecture is implemented on the SPARTAN-3A and Vertex5 family of FPGAs for comparing the design efficiency in terms of device utilization. The design is ported into the SPARTAN-3A evaluation board and the on chip debugging is done using the chipscope-pro tool. The experimental results obtained demonstrate the usefulness of the proposed system in terms of the system resources, its capabilities for design, validation and practical implementation purposes.