Performance Comparison of Different Asynchronous Design Methodologies

Today, synchronous   circuits are being operated at very high clock frequency. With this frequency high speed of electronics devices has increased but at the cost of power dissipation. In synchronous design having millions of transistors, single clock is to be supplied to all the components.  Thus, maximum speed of the device is considered by the slowest component in the block. In this way synchronous design is also having a speed constraint. To overcome these problems, asynchronous design can be a solution. Various  techniques  are  prevailing  to make  design asynchronous namely  handshaking, clock  gating  and  Globally  Asynchronous and  Locally Synchronous  (GALS). Apart from these techniques, edge detection based technique is also introduced in this paper.