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Development of Optimum Steganography System Using Edge Detection and LSB Technique on FPGA


Affiliations
1 Department of Technology, Shivaji University, Kolhapur, India
     

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Realization of image processing applications on hardware platform such as FPGA has gained importance due to various factors such as implementation speed, low development cost, less time to market and parallel processing existing in it. In this research paper, a methodology for implementing steganography system based on edge detection and LSB technique on a field programmable gate array (FPGA) using a DSP design tool, Xilinx system generator (XSG) is proposed. The architecture consists of two phases, Phase I –the embedding procedure and Phase II –the extracting procedure. System Generator is a tool provided by Xilinx which enables us to use Math Works Simulink design environment for design of FPGA. Xilinx System Generator (XSG) is the most efficient tool for MATLAB. The objective is, to simulate, synthesize and implement Image Steganography algorithm on FPGA platform. Hardware implementation of Steganography is realized using the Xilinx Block Sets present in Simulink. The design was implemented targeting a Virtex6 (xc6vlx240T-1ffg1156) device. Total time required to design an image processing system is effectively reduced due to the use of XSG tool.


Keywords

LSB Technique, FPGA, Sobel, Steganography, System Generator.
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  • Development of Optimum Steganography System Using Edge Detection and LSB Technique on FPGA

Abstract Views: 251  |  PDF Views: 1

Authors

Madhurima R. Bodhale
Department of Technology, Shivaji University, Kolhapur, India
P. C. Bhaskar
Department of Technology, Shivaji University, Kolhapur, India

Abstract


Realization of image processing applications on hardware platform such as FPGA has gained importance due to various factors such as implementation speed, low development cost, less time to market and parallel processing existing in it. In this research paper, a methodology for implementing steganography system based on edge detection and LSB technique on a field programmable gate array (FPGA) using a DSP design tool, Xilinx system generator (XSG) is proposed. The architecture consists of two phases, Phase I –the embedding procedure and Phase II –the extracting procedure. System Generator is a tool provided by Xilinx which enables us to use Math Works Simulink design environment for design of FPGA. Xilinx System Generator (XSG) is the most efficient tool for MATLAB. The objective is, to simulate, synthesize and implement Image Steganography algorithm on FPGA platform. Hardware implementation of Steganography is realized using the Xilinx Block Sets present in Simulink. The design was implemented targeting a Virtex6 (xc6vlx240T-1ffg1156) device. Total time required to design an image processing system is effectively reduced due to the use of XSG tool.


Keywords


LSB Technique, FPGA, Sobel, Steganography, System Generator.