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Design of Systolic Based Optimization Tool for FIR Filters Using Binary Tour Method


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1 KVG College of Engineering, Sullia, Karnataka, India
     

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The project is concerned with the design of systolic array by using linear mapping techniques on regular dependence graph (DG), the mapping technique transforms a Dependency graph to a space-time representation, where each node is mapped to a certain processing element and is scheduled to a certain time instance. The systolic design methodology maps an N-dimensional DG to a lower dimensional systolic architecture. The basic vectors involved in the systolic array design should satisfy feasibility condition for designing the tool. MATLAB version 7.01 is the platform used to design the FIR tool for faster implementation, and to achieve low level designs for selected vectors. The tool designed can also be used in selection of Scheduling inequalities and projection vector to meet the feasibility condition, and to achieve 100% HUE using “Tournament Selection” Method. The Tournament selection typically used in Evolutionary Programming, allows for tuning the degree of stringency of the selection imposed, Rather than Selecting on the basis of each Solutions fitness or error in light of the objective function at hand, selection is made on the basis on the number of wins, earned in a competition.

Keywords

Dependence Graph, Processing Element, Systolic Array, Tournament Selection Method.
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  • Design of Systolic Based Optimization Tool for FIR Filters Using Binary Tour Method

Abstract Views: 229  |  PDF Views: 1

Authors

P. Chandra Shekar
KVG College of Engineering, Sullia, Karnataka, India
B. S. Prashanth
KVG College of Engineering, Sullia, Karnataka, India

Abstract


The project is concerned with the design of systolic array by using linear mapping techniques on regular dependence graph (DG), the mapping technique transforms a Dependency graph to a space-time representation, where each node is mapped to a certain processing element and is scheduled to a certain time instance. The systolic design methodology maps an N-dimensional DG to a lower dimensional systolic architecture. The basic vectors involved in the systolic array design should satisfy feasibility condition for designing the tool. MATLAB version 7.01 is the platform used to design the FIR tool for faster implementation, and to achieve low level designs for selected vectors. The tool designed can also be used in selection of Scheduling inequalities and projection vector to meet the feasibility condition, and to achieve 100% HUE using “Tournament Selection” Method. The Tournament selection typically used in Evolutionary Programming, allows for tuning the degree of stringency of the selection imposed, Rather than Selecting on the basis of each Solutions fitness or error in light of the objective function at hand, selection is made on the basis on the number of wins, earned in a competition.

Keywords


Dependence Graph, Processing Element, Systolic Array, Tournament Selection Method.