Selective Harmonic Elimination Technique in Multilevel Inverter Fed Induction Motor

The selective harmonic elimination technique method has been studied using multilevel inverter in electrical drives. The selective harmonic elimination PWM method has an advantage over other harmonic PWM methods. The other methods are SHMPWM, SVMPWM where they concentrate on reducing the harmonics rather than eliminating. In the conventional method, the diode clamped three level inverter is used where in proposed method cascaded H bridge multilevel inverter is used. There are many advantages of using cascaded H bridge inverter than diode clamped multi level inverter. They are number of switches used and the levels of output produced. The simulation of the cascaded multilevel H bridge inverter has been done and the output is verified. The obtained output signal will be compared with the reference signal and then the PWM output will be obtained. In this paper three level cascaded multilevel inverter is used and the output of the inverter is given to the drives. Since the output of the inverter has harmonics which is the main cause for various loads. Such harmonics are eliminated by varying the conduction angle and the output has been verified.