A Review on Various Parameter Variation of Carbon Nanotube Field Effect Transistors

With the continuous trend of reducing feature size, and employing continuously smaller components on integrated circuits, new challenges arises on the way of silicon CMOS circuits and devices. The emerging devices, partially due to their extremely small dimensions, show large variations in their behavior. The variation shown by these devices affects their reliability and the performance of circuits made from them. After aggressive scaling, the bulk Complementary Metal Oxide Semiconductor (CMOS) technology is facing numerous challenges which have motivated the researchers to concentrate for other promising devices. Parameter variation is below 90nm technologies will pose a major challenge for the future high speed microprocessor. Now, in this paper we have discussed various parameter variation like process, temperature, and voltage variation.