Table of Contents
Vol 1, No 7 (2009)
Open Access
Subscription Access
Articles
High-Speed 4 BIT Flash ADC Using CMOS Latched Comparator with Current Steering Logic SR Latch | ||
A. Karthikeyan, V. Srividhya, P. Murugeswari | ||
Vol 1, No 7 (2009), Pagination: 168-174 | ||
ABSTRACT | PDF | Abstract Views: 216 | PDF Views: 7 |
Large Radial Distribution Network Optimization through Algorithm Design Technique | ||
S. Thiruvenkadam, A. Nirmalkumar, M. Sathiskumar | ||
Vol 1, No 7 (2009), Pagination: 175-182 | ||
ABSTRACT | PDF | Abstract Views: 187 | PDF Views: 4 |
A Novel AES VLSI Architecture with Fully-Sub Pipelined Structure for High Throughput and Area Efficiency | ||
R. Sakthivel, S. Balamurugan, M. Vanitha | ||
Vol 1, No 7 (2009), Pagination: 183-188 | ||
ABSTRACT | PDF | Abstract Views: 225 | PDF Views: 2 |
Design and Development of Microstrip Patched Antenna Array | ||
P. Laksminarayana, Mahesh Mudavath, V. Omjee, K. Kumara Swamy | ||
Vol 1, No 7 (2009), Pagination: 189-196 | ||
ABSTRACT | PDF | Abstract Views: 260 | PDF Views: 3 |
Network-on-Chip Design Space Exploration:A Hybrid Approach | ||
Rabindra K. Jena, Pankaj Srivastav, G. K. Sharma | ||
Vol 1, No 7 (2009), Pagination: 197-203 | ||
ABSTRACT | PDF | Abstract Views: 188 | PDF Views: 3 |