Programmable Device Circuits and Systems

Abstract

In this paper, we present a Carry Skip Adder (CSKA) structure with lower energy consumption and area compared with the existing one. Instead of utilizing multiplexer logic, the AND-OR-Invert and OR-AND-Invert compound gates are used for the skip logic. For further improvement, the structure utilizes a parallel prefix adder designed with Han-Carlson adder using 45nm CMOS technology, which can be modeled in Tanner EDA tool.

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