Programmable Device Circuits and Systems

Pooja Chawhan ¹, Akanksha Sinha ²

Affiliations
1 Department of Electronics and Telecommunication, Bhilai (C.G.), IN
2 Department of E & I, SSTC-SSGI, IN

Abstract

In the digital electronic, the adder are most important fundamental in wide variety of digital system. There are among the fast adder exist, but fast adding using less area, delay and power consumption is still challenging of digital electronic. The designer of integrated circuit, are occupancy play most important role because its increasing the necessary of portable system. The carry select adder is one of the fastest adders used in many data processing processors to perform fast arithmetic function. The carry select structure is required large area and more power consumption because its internal structure is consist of two ripple carry adder and the multiplexer. The moderns design of carry select adder requiring a reduction area and less power consumption. In this project, the proposed design using 14Ttransistor 1bit adder is used to design of 4 bit carry select adder has reduced the transistor count and providelesser power consumption as well as power delay product as compared to the other existing logic. The main advantage of proposed design of 4bit carry select adder using 14-T transistor 1bit adder provide lesser power consumption and power delay product. The simulation result is carried out using mentor graphic tanner EDA 16.3 version tool and BISM4 45nm CMOS technology.

Keywords

Carry Select Adder, Low Power Design, 14T Transistor 1 Bit Adder, Nanometre Technology.

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