Open Access Open Access  Restricted Access Subscription Access
Open Access Open Access Open Access  Restricted Access Restricted Access Subscription Access

Fault Based Testing of Low Noise Amplifier


Affiliations
1 Department of Electronics and Communication Engineering, PSG College of Technology, Coimbatore, India
     

   Subscribe/Renew Journal


This paper presents a cost effective Embedded Test Circuit (ETC) for single ended Low Noise Amplifiers (LNA).The ETC operation is based on the observation that the presence of catastrophic faults, like resistive bridging, shorts and opens, or parametric faults, result in the attenuation of the output voltage amplitude (gain reduction). It unifies the benefits of reduced Automatic Test Equipment (ATE) complexity of defect based approaches. The ETC along with a single ended LNA has been designed in a 0.35μm CMOS technology using CADENCE tool to evaluate the efficiency of the proposed approach and experimental results are presented.

Keywords

Embedded Test Circuit, Low Noise Amplifier, Catastrophic and Parametric Faults.
User
Subscription Login to verify subscription
Notifications
Font Size

Abstract Views: 122

PDF Views: 3




  • Fault Based Testing of Low Noise Amplifier

Abstract Views: 122  |  PDF Views: 3

Authors

K. Deepalakshmi
Department of Electronics and Communication Engineering, PSG College of Technology, Coimbatore, India
P. Kalpana
Department of Electronics and Communication Engineering, PSG College of Technology, Coimbatore, India

Abstract


This paper presents a cost effective Embedded Test Circuit (ETC) for single ended Low Noise Amplifiers (LNA).The ETC operation is based on the observation that the presence of catastrophic faults, like resistive bridging, shorts and opens, or parametric faults, result in the attenuation of the output voltage amplitude (gain reduction). It unifies the benefits of reduced Automatic Test Equipment (ATE) complexity of defect based approaches. The ETC along with a single ended LNA has been designed in a 0.35μm CMOS technology using CADENCE tool to evaluate the efficiency of the proposed approach and experimental results are presented.

Keywords


Embedded Test Circuit, Low Noise Amplifier, Catastrophic and Parametric Faults.