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A New Compensation Technique for Stable The Gain of Sub-Micron Amplifiers


Affiliations
1 Dept of VLSISD, CR Engineering College, Tirupati, Chittor, AP, India
2 Dept of ECE, CR Engineering College, Tirupati, Chittor, AP, India
3 Dept of Electronics, SJD&PG College, Hyderabad, TS, India
 

Process variation is an difficulty in designing reliable CMOS mixed signal systems with high yield. To minimize the variation in voltage gain due to variations in process, supply voltage, and temperature for common trans conductance-based amplifiers, we present a new compensation method based on statistical feedback of process information. We further apply our scheme to two well known amplifier topologies in the sun-micron CMOS process as design examples-an inductive degenerated low-noise amplifier (LNA) and a common source amplifier (CSA). The proposed method improves the variation in S21 of an inductively degenerated cascade LNA from 8.75% to 1.27%, which is a reduction in variation of 85%. The presented scheme is also robust over variations in supply voltage, temperature, and process conditions. The compensation method presented can be utilized to stabilize the gain of a wide variety of amplifiers.

Keywords

CMOS Analog Integrated Circuits, Process Compensation, Process Variation, Self-Biasing.
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  • A New Compensation Technique for Stable The Gain of Sub-Micron Amplifiers

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Authors

Billu Balaji
Dept of VLSISD, CR Engineering College, Tirupati, Chittor, AP, India
V. Thrimurthulu
Dept of ECE, CR Engineering College, Tirupati, Chittor, AP, India
L. Mihira Priya
Dept of Electronics, SJD&PG College, Hyderabad, TS, India

Abstract


Process variation is an difficulty in designing reliable CMOS mixed signal systems with high yield. To minimize the variation in voltage gain due to variations in process, supply voltage, and temperature for common trans conductance-based amplifiers, we present a new compensation method based on statistical feedback of process information. We further apply our scheme to two well known amplifier topologies in the sun-micron CMOS process as design examples-an inductive degenerated low-noise amplifier (LNA) and a common source amplifier (CSA). The proposed method improves the variation in S21 of an inductively degenerated cascade LNA from 8.75% to 1.27%, which is a reduction in variation of 85%. The presented scheme is also robust over variations in supply voltage, temperature, and process conditions. The compensation method presented can be utilized to stabilize the gain of a wide variety of amplifiers.

Keywords


CMOS Analog Integrated Circuits, Process Compensation, Process Variation, Self-Biasing.