International Journal of Engineering Research

P. Rajasekhar Reddy ¹, S. H. Bharathi ¹

Affiliations
1 VLSI Design & Embedded Systems, Dept. of ECE, Reva Institute of Technology and Management, Bangalore, 560064, IN
2 VLSI Design & Embedded systems, Dept. of ECE, Reva Institute of Technology and Management, Bangalore, 560064, IN

Abstract

The paper describe and gives the method of designing simple Ethernet module server on FPGA with Nios II core. Usage of any application on risc processor can be simple by using web server and monitoring. A Web-server through ethernet is connection that transfers the content on a computer or a system with web browser through network. Every FPGA or Ethernet will have a different MAC ID or a unique IP address. Any computer can perform as a Web server by installing a standard browser software.

Keywords

FPGA With NIOS II Chip, QSYS Tool, NIOS Build Tools for Eclipse, Ethernet, Timing Module, Web Server.

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