Design and Implementation of Zigbee Transreceiver Using CMOS Architecture

There is always the requirements of efficiency enhancement in each architecture. If the hardware based architectures are optimized, It will enhance the complete system. The proposed work is in same direction to reduce the power consumption in the construction of Zigbee Transreciever. The proposed work is the implementation of Zigbee based transceiver system with CMOS technology. We are proposing the implementation of in Active HDL simulation environment. We have to study and perform the analysis of zigbee protocol respective to the packet loss and the throughput in the environment. We will also analyze the power consumption rate in the network. The proposed system is analysis of QPSK modulation. In this system we will implement the phase error to analyze the reliability of the system.