Open Access
Subscription Access
Open Access
Subscription Access
Ultra-Low Power Voltage Reference Circuit Utilizing a Threshold Voltage Difference Between Two CNFETs
Subscribe/Renew Journal
This paper proposes a voltage reference circuit that exploits sub-threshold conduction and threshold voltage difference between two carbon nanotube field effect transistors (CNFETs) to achieve ultra-low power consumption. The circuit produces a reference voltage of 203mV at 0.5V supply voltage, consumes only 3.42pW power and exhibits excellent temperature and power supply independence. The robustness of the proposed circuit for variations in carbon nanotube (CNT) diameter and inter CNT pitch variations is also presented with Monte Carlo simulations.
Keywords
Carbon Nanotube Field Effect Transistor, Ultra-Low Power Circuits, Voltage References.
Subscription
Login to verify subscription
User
Font Size
Information
- G. De Vita and G. Iannaccone, “A Sub-1-V, 10 ppm/°C, Nanopower Voltage Reference Generator”, IEEE Journal of Solid-State Circuits, Vol. 42, No.7, pp. 1536-1542, 2007.
- G. Giustolisi, G. Palumbo, M. Criscione and F. Cutri, “A Low-Voltage Low-Power Voltage Reference based on Subthreshold MOSFETs”, IEEE Journal of Solid-State Circuits, Vol. 38, No. 1, pp. 151-154, 2003.
- B. Ma and F. Yu, “A Novel 1.2-V 4.5-ppm/°C Curvature-Compensated CMOS Bandgap Reference”, IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications, Vol. 61, No. 4, pp. 1026-1035, 2014.
- M. Alioto, “Ultra-Low-Voltage VLSI Circuits and Systems for Green Computing”, IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 59, No. 12, pp. 849-852, 2012.
- R. Sarpeshkar, “Ultra Low Power Bioelectronics”, Cambridge University Press, 2010.
- K. Lee, T. Lande and P. Hafliger, “A Sub- Bandgap Reference Circuit with an Inherent Curvature-Compensation Property”, IEEE Transactions on Circuits and Systems I: Regular Papers, Vol. 62, No. 1, pp. 1-9, 2015.
- R. Perry, S. Lewis, A. Brokaw and T. Viswanathan, “A 1.4V Supply CMOS Fractional Bandgap Reference”, IEEE Journal of Solid-State Circuits, Vol. 42, No. 10, pp. 2180-2186, 2007.
- M. Seok, G. Kim, D. Blaauw and D. Sylvester, “A Portable 2-Transistor Picowatt Temperature-Compensated Voltage Reference Operating at 0.5V”, IEEE Journal of Solid-State Circuits, Vol. 47, No. 10, pp. 2534-2545, 2012.
- D. Albano, F. Crupi, F. Cucchi and G. Iannaccone, “A Picopower Temperature-Compensated, Subthreshold CMOS Voltage Reference”, International Journal of Circuit Theory and Applications, Vol. 42, No. 12, pp. 1306-1318, 2014.
- I. Ferain, C. Colinge and J. Colinge, “Multigate Transistors as the Future of Classical Metal-Oxide-Semiconductor Field-Effect Transistors”, Nature, Vol. 479, pp. 310-316, 2011.
- H. Iwai, “Roadmap for 22Nm and Beyond”, Microelectronic Engineering, Vol. 86, No. 8-9, pp. 1520-1528, 2009.
- Y. Kim, “Challenges for Nanoscale MOSFETs and Emerging Nanoelectronics”, Transactions on Electrical and Electronic Materials, Vol. 11, No. 3, pp. 93-105, 2010.
- K. Kuhn, “CMOS Transistor Scaling Past 32nm and Implications on Variation”, Proceedings of International Conference on IEEE/SEMI Advanced Semiconductor Manufacturing, pp. 241-246, 2010.
- S. Iijima, “Helical Microtubules of Graphitic Carbon”, Nature, Vol. 354, pp. 56-58, 1991.
- J. Charlier, X. Blase and S. Roche, “Electronic and Transport Properties of Nanotubes”, Reviews of Modern Physics, Vol. 79. pp. 677-732, 2007.
- H. Dai, A. Javey, E. Pop, D. Mann, W. Kim and Y. Lu, “Electrical Transport Properties and Field-Effect Transistors of Carbon Nanotube”, Nano, Vol. 1, No. 1, pp. 1-13, 2006.
- Q. Cao and J. Rogers, “Ultrathin Films of Single-Walled Carbon Nanotubes for Electronics and Sensors: A Review of Fundamental and Applied Aspects”, Advanced Materials, Vol. 21, No. 1, pp. 29-53, 2009.
- J. Mintmire and C. White, “Universal Density of States for Carbon Nanotubes”, Physical Review Letters, Vol. 81, No. 12, pp. 2506-2509, 1998.
- J. Deng and H. Wong, “A Compact SPICE Model for Carbon Nanotube Field-Effect Transistors including Non-Idealities and its Application-Part I: Model of the Intrinsic Channel Region”, IEEE Transactions on Electron Devices, Vol. 54, No. 12, pp. 3186-3194, 2007.
- J. Deng, “Device Modeling and Circuit Performance Evaluation for Nanoscale Devices: Silicon Technology beyond 45 nm Node and Carbon Nanotube Field Effect Transistors”, Ph.D. Dissertation, Department of Electrical Engineering, Stanford University, 2007.
- A. Lin, N. Patil, R. Koungmin , A. Badmaev, L. De Arco, Z. Chongwu, S. Mitra and H. Wong, “Threshold Voltage and On–Off Ratio Tuning or Multiple-Tube Carbon Nanotube FETs”, IEEE Transactions on Nanotechnology, Vol. 8, No. 1, pp. 4-9, 2009.
- S. Kumar Sinha and S. Chaudhury, “Analysis of Different Parameters of Channel Material and Temperature on Threshold Voltage of CNTFET”, Materials Science in Semiconductor Processing, Vol. 31, No. 1, pp. 431-438, 2015.
- C. Garcia and A. Rubio, “Manufacturing Variability Analysis in Carbon Nanotube Technology: A Comparison with Bulk CMOS in 6T SRAM Scenario”, Proceedings of IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, pp. 121-125, 2011.
- H. Shahidipour, Y. Zhong, A. Ahmadi and K. Maharatna, “Effects of CNT Diameter Variability on a CNFET based SRAM”, Proceedings of Asia Pacific Conference on Circuits and Systems, pp. 231-235, 2010.
- X. Liu, T. Pichler, M. Knupfer, M. Golden, J. Fink, H. Kataura and Y. Achiba, “Detailed Analysis of the Mean Diameter and Diameter Distribution of Single-Wall Carbon Nanotubes from their Optical Response”, Physical Review B, Vol. 66, No. 4, pp. 454-459, 2002.
Abstract Views: 216
PDF Views: 0