Design and Implementation of Cache Memory using CMOS Transistors

Cache systems are on-chip memory component utilized to store information. Cache serves as a buffer between a CPU and its principle memory. Cache memory is utilized to synchronize the data transfer rate between CPU and principle memory. As cache memory closer to the smaller scale processor, it is faster than the Random access memory (RAM) and principle memory. The advantage of storing data on cache, as compared to RAM, is that it has faster retrieval times, but it has disadvantage of on-chip energy consumption. In term of detecting number of cache hits and miss rate for the range of instructions and less power consumption, the efficient cache memory will be proposed using CMOS transistors. Evaluate the performance of cache memory in terms of power dissipation and speed of operations. Design architect IC, a tool of mentor graphics, is used for designing schematic diagram and eldonet is used for simulation of designed model.