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Simulation & Analysis of Sigma-Delta A/D Converter using VHDL-AMS


Affiliations
1 Dept. of Electronics & Telecommunication Engg, LNCT, Bhopal, (M.P.), India
 

Analog to digital converter is a fundamental component for digital processors since every signal which needs to be processed using digital algorithms requires the digital data. There are many different types of A/D converters are available but the sigma delta A/D converter has their unique advantage over others as they have only 10 to 15 percent analog components and rest are digital. This makes it good candidate when the A/D needs to integrate with the DSP in single chip, but the integration of two domains creates difficulty to evaluate the behavior of A/D using normal simulators hence special simulators called analog and mixed signal simulators are required in this paper we presented the detail simulation and analysis of sigma delta A/D using VHDLAMS.

Keywords

Sigma Delta A/D Converters, VHDLAMS.
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  • Simulation & Analysis of Sigma-Delta A/D Converter using VHDL-AMS

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Authors

Prerna Gupta
Dept. of Electronics & Telecommunication Engg, LNCT, Bhopal, (M.P.), India
Rita Jain
Dept. of Electronics & Telecommunication Engg, LNCT, Bhopal, (M.P.), India

Abstract


Analog to digital converter is a fundamental component for digital processors since every signal which needs to be processed using digital algorithms requires the digital data. There are many different types of A/D converters are available but the sigma delta A/D converter has their unique advantage over others as they have only 10 to 15 percent analog components and rest are digital. This makes it good candidate when the A/D needs to integrate with the DSP in single chip, but the integration of two domains creates difficulty to evaluate the behavior of A/D using normal simulators hence special simulators called analog and mixed signal simulators are required in this paper we presented the detail simulation and analysis of sigma delta A/D using VHDLAMS.

Keywords


Sigma Delta A/D Converters, VHDLAMS.