High Performance Dynamic Full Adder Cell: A Comparative Analysis

In this paper we have presented three 1-bit full adder cells namely Conventional adder, Transmission gate based adder and 14T adder in dynamic logic style. One bit adder circuits are used to design 4-bit, 8-bit and 16-bit ripple carry adder circuit. In these circuits we have used clock to switch ON and OFF the circuit during evaluation and standby mode, respectively. It helps in improving the performance parameters as compared to the dynamic multi-output logic style in which two PMOS transistors are used to charge the outputs in precharge phase and one NMOS transistor to discharge the output during evaluation phase. Simulation result shows improvements in delay, average power and PDP at 500MHz frequency at 32nm technology using 1.0 voltage supply. Result shows that among proposed dynamic adders 14T dynamic adder has best performance parameter as compared to conventional and transmission gate based adder.