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Design and Analysis of Low Leakage 64-Bit Hybrid Adder using 22nm Technology


Affiliations
1 Electronics and Communication Engineering, Yadavindra College of Engineering, Talwandi Sabo, India
 

Adders are one of the basic components in most of the digital systems. Optimization of these adders can improve the performance of the entire system. In this paper we present a multiplexer based hybrid adder to reduce leakage power. To reduce the leakage power we have used the transistor stacking technique. We have compared the conventional multi-level adder and hybrid adder in terms of delay, average power, leakage power and PDP. All the simulations are done using Tanner Tool v13.0 at 500MHz frequency in 22nm technology at a supply voltage of 1.0V. Simulation results show the decrease of leakage power in hybrid adder.

Keywords

HAU (Hybrid Adder Unit), CLA (Carry Look Ahead Adder), CSA (Carry Skip Adder), CMOS (Complementary Metal Oxide Semiconductor), VLSI (Very Large Scale Integration), PDP (Power Delay Product).
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  • Design and Analysis of Low Leakage 64-Bit Hybrid Adder using 22nm Technology

Abstract Views: 248  |  PDF Views: 0

Authors

Khushveen Sidhu
Electronics and Communication Engineering, Yadavindra College of Engineering, Talwandi Sabo, India
Candy Goyal
Electronics and Communication Engineering, Yadavindra College of Engineering, Talwandi Sabo, India

Abstract


Adders are one of the basic components in most of the digital systems. Optimization of these adders can improve the performance of the entire system. In this paper we present a multiplexer based hybrid adder to reduce leakage power. To reduce the leakage power we have used the transistor stacking technique. We have compared the conventional multi-level adder and hybrid adder in terms of delay, average power, leakage power and PDP. All the simulations are done using Tanner Tool v13.0 at 500MHz frequency in 22nm technology at a supply voltage of 1.0V. Simulation results show the decrease of leakage power in hybrid adder.

Keywords


HAU (Hybrid Adder Unit), CLA (Carry Look Ahead Adder), CSA (Carry Skip Adder), CMOS (Complementary Metal Oxide Semiconductor), VLSI (Very Large Scale Integration), PDP (Power Delay Product).