Design and Implementation of High Speed Fir Filters Using DA Algorithm

Distributed Arithmetic (DA) is a high speed multiplication technique used for implementation of digital filters. The complicated multiplication-accumulation operation is converted to the shifting and adding operation when the DA algorithm is directly applied to realize FIR filter. In this paper the distributed arithmetic based design scheme for non recursive DSP systems requiring high speed computing is designed. Implementation for FPGAs has been done on Spartan 3E series FPGA, target device (XC3S500E) from Xilinx. A significant decline in delay is reported for an FIR filters from 8.188ns to 4.778ns using DA algorithm.