Device Modeling and Transistor Stacking for High Speed with Low Power Requirements Using Double Gate Devices

This paper describes the device characteristics verification and biasing analysis of Silicon on Insulator (SOI) devices with single gate and double gate in comparison with bulk MOSFET. Improvement in threshold voltage controllability and variability has been observed for these devices. One of the leading double gate devices, FinFET is analyzed over different parameter variations and with back biasing techniques. Wide threshold voltage controllability of the FinFET device in comparison with all other devices is justified. The performance of independently gated four–terminal FinFETs with symmetric gate-oxide thickness (tox1=tox2=0.5nm) and the same kind FinFET with asymmetric gate-oxide thickness whose front gate-oxide tox1=0.5nm and back gate-oxide tox2=5nm, has been successfully analyzed. A comparison between symmetric and asymmetric gate work function has been analyzed. Also the gate oxide materials are changed and the response for High-K materials is analyzed and compared with the conventional devices. Some of the peculiar characteristics exhibited by the device for the fin width variation when controlled in single gate (SG) and independent gate (IG) modes have been proposed here.