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Design and FPGA Implementation of DDR3 SDRAM Controller for High Performance


Affiliations
1 Dept. of Electronics and Communication, M.A.N.I.T, Bhopal, India
 

The demand for faster and cheaper memories has been increasing by the day. Hence, these memory devices are rapidly developing to give high density and high memory bandwidths. However, with the increase in technology, complexity of instructions to control the memory devices also increases. In this paper, a specific purpose DDR3 Controller is described. This paper presents the overall architecture of the DDR3 Controller. Also the advantages of DDR3 over DDR2 and DDR are discussed.

Keywords

DDR3, VHDL, Xilinx, FPGA.
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  • Design and FPGA Implementation of DDR3 SDRAM Controller for High Performance

Abstract Views: 260  |  PDF Views: 246

Authors

Shabana Aqueel
Dept. of Electronics and Communication, M.A.N.I.T, Bhopal, India
Kavita Khare
Dept. of Electronics and Communication, M.A.N.I.T, Bhopal, India

Abstract


The demand for faster and cheaper memories has been increasing by the day. Hence, these memory devices are rapidly developing to give high density and high memory bandwidths. However, with the increase in technology, complexity of instructions to control the memory devices also increases. In this paper, a specific purpose DDR3 Controller is described. This paper presents the overall architecture of the DDR3 Controller. Also the advantages of DDR3 over DDR2 and DDR are discussed.

Keywords


DDR3, VHDL, Xilinx, FPGA.