SON, ISESON and Dual Material ISESON MOSFETs:Performance Estimation and Investigation by TCAD

This research paper, inspected the different characteristics of SON (Silicon On Nothing), ISESON (Insulated Shallow Extension Silicon On Nothing) and Dual Material ISESON MOSFETs with gate length of 45 nm via ATLAS device simulator in the introduction of dielectric separation by constructing dielectric columns (ISE) with oxide film. At this point, the upshot of simulations has been authenticated by associating characteristics of different architectures. It exhibits SON blueprint under dissimilar gate biases with superior on-state resistance owing to inferior on-state current in ISESON evaluated to SON and Dual Material ISESON by considering dissimilar gate-drain biases, high functional temperatures and transconductance. Hence, the ultimate ending of ISESON relates it as a apposite device for short voltage and elevated momentum applications.