ICTACT Journal on Microelectronics

Open Access Open Access  Restricted Access Subscription Access
Open Access Open Access Open Access  Restricted Access Restricted Access Subscription Access

Implementation of a Hybrid Ring Oscillator Physical Unclonable Function


Affiliations
1 Department of Electronics and Communication Engineering, Mepco Schlenk Engineering College, India
2 Department of Electronics and Communication Engineering, Kalasalingam University, India
     

   Subscribe/Renew Journal


Developing a hybrid ring oscillator based Physical Unclonable Function (PUF) in FPGA is the main work of this paper. Each structure has its own virtuous characteristics thus the desirable characteristics are selected from each PUF then they are combined together to get the hybrid PUF structure. Mainly PUF structures are used as random number generator which should be same at all the generation times. This property makes the circuit suitable for secure cryptographic structure applications. In this paper hybrid ring oscillator structure is proposed for enhancing uniqueness and reliability. The experiments were conducted on Xilinx FPGA’s with the certain challenging set and produce unique response only for the concerned chip. In the experimental analysis, the proposed design increases the circuit complexity, but the power consumption seems to be same with the traditional designs.

Keywords

Hardware Security, Uniqueness, Random Number Generation, Intrinsic PUFs, IP Protection, IC Authentication.
Subscription Login to verify subscription
User
Notifications
Font Size

  • G.E. Suh, C.W. O’Donnell, Ishan Sachdev and Srinivas Devadas, “Design and Implementation of the AEGIS Single- Chip Secure Processor using Physical Random Functions”, Proceedings of 32nd International Symposium on Computer Architecture, pp. 25-36, 2005.

  • Iluminada Baturone, Miguel A. Prada-Delgado and Susana Eiroa, “Improved Generation of Identifiers, Secret Keys, and Random Numbers From SRAM”, IEEE Transactions on Information Forensics and Security, Vol. 10, No. 12, pp. 2653-2668, 2015.

  • M.D. Yu and S. Devadas, “Secure and Robust Error Correction for Physical Unclonable Function”, IEEE Design and Test of Computers, Vol. 27, No. 1, pp. 48-65, 2010.

  • Takanori Machida, Dai Yamamoto, Mitsugu Iwamoto and Kazuo Sakiyama, “A New Arbiter PUF for Enhancing Unpredictability on FPGA”, The Scientific World Journal, Vol. 2015, pp. 1-13, 2015.

  • S. Dolev, L. Krzywiecki, N. Panwar and M. Segal, “Optical PUF for Non Forwardable Vehicle Authentication”, Proceedings of IEEE 14th International Symposium on Network Computing and Applications, pp. 204-207, 2015.

  • Qinglong Zhang, Zongbin Liu, Cunqing Ma, Changting Li and Jiwu Jing, “FROPUF: How to Extract More Entropy from Two Ring Oscillators in FPGA-based PUFs”, Proceedings of International Conference on Security and Privacy in Communication Systems, pp. 675-693, 2016.

  • J. Zhang, Y. Lin, Y. Lyu and G. Qu, “A PUF-FSM Binding Scheme for FPGA IP Protection and Pay-Per-Device Licensing”, IEEE Transactions on Information Forensics and Security, Vol. 10, No. 6, pp. 1137-1150, 2015.

  • Roel Maes, “Physically Unclonable Functions: Concept and Constructions”, Physically Unclonable Functions, pp. 11-48, 2013.

  • G. Edward Suh and Srinivas Devadas, “Physical Unclonable Functions for Device Authentication and Secret Key Generation”, Proceedings of ACM/IEEE 44th Annual Design Automation Conference, pp. 9-14, 2007.

  • A. Maiti and P. Schaumont, “Improving the Quality of a Physical Unclonable Function using Configurable Ring Oscillators”, Proceedings of IEEE International Conference on Field Programmable Logic and Applications, pp. 703-707, 2009.

  • X. Xin, J.P. Kaps and K. Gaj, “A Configurable Ring-Oscillator-Based PUF for Xilinx FPGAs”, Proceedings of Euromicro Conference on Digital System Design, pp. 651-657, 2011.

  • M. Cortez, A. Dargar, S. Hamdioui and G.J. Schrijen, “Modeling SRAM Start-Up Behavior for Physical Unclonable Functions”, Proceedings of IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, pp. 1-6, 2012.

  • S.S. Kumar, J. Guajardo, R. Maes, G.J. Schrijen and P. Tuyls, “The Butterfly PUF Protecting IP on Every FPGA”, Proceedings of IEEE International Workshop on Hardware-Oriented Security and Trust, pp. 67-70, 2008.

  • Dai Yamamoto, Masahiko Takenaka, Kazuo Sakiyama and Naoya Torii, “Security Evaluation of Bistable Ring PUFs on FPGAs using Differential and Linear Analysis”, Proceedings of Federated Conference on Computer Science and Information Systems, pp. 911-918, 2014.

  • G.S. Rose, N. McDonald, L.K. Yan, B. Wysocki and K. Xu, “Foundations of Memristor based PUF Architectures”, Proceedings of IEEE/ACM International Symposium on Nanoscale Architectures, pp. 52-57, 2013.

  • P Tuyls, GJ Schrijen, B Skoric and J Van Geloven, “Read-Proof Hardware from Protective Coatings”, Proceedings of 8th International Conference on Cryptographic Hardware and Embedded Systems, pp. 369-383, 2006.

  • Xiaolin Xu, Ulrich Ruhrmair, Daniel E. Holcomb and Wayne Burleson, “Security Evaluation and Enhancement of Bistable Ring PUFs”, Proceedings of International Workshop on Radio Frequency Identification: Security and Privacy Issues, pp. 3-16, 2015.


Abstract Views: 307

PDF Views: 0




  • Implementation of a Hybrid Ring Oscillator Physical Unclonable Function

Abstract Views: 307  |  PDF Views: 0

Authors

N. Sivasankari
Department of Electronics and Communication Engineering, Mepco Schlenk Engineering College, India
A. Muthukumar
Department of Electronics and Communication Engineering, Kalasalingam University, India

Abstract


Developing a hybrid ring oscillator based Physical Unclonable Function (PUF) in FPGA is the main work of this paper. Each structure has its own virtuous characteristics thus the desirable characteristics are selected from each PUF then they are combined together to get the hybrid PUF structure. Mainly PUF structures are used as random number generator which should be same at all the generation times. This property makes the circuit suitable for secure cryptographic structure applications. In this paper hybrid ring oscillator structure is proposed for enhancing uniqueness and reliability. The experiments were conducted on Xilinx FPGA’s with the certain challenging set and produce unique response only for the concerned chip. In the experimental analysis, the proposed design increases the circuit complexity, but the power consumption seems to be same with the traditional designs.

Keywords


Hardware Security, Uniqueness, Random Number Generation, Intrinsic PUFs, IP Protection, IC Authentication.

References