ICTACT Journal on Microelectronics

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Implementation of a Hybrid Ring Oscillator Physical Unclonable Function


Affiliations
1 Department of Electronics and Communication Engineering, Mepco Schlenk Engineering College, India
2 Department of Electronics and Communication Engineering, Kalasalingam University, India
     

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Developing a hybrid ring oscillator based Physical Unclonable Function (PUF) in FPGA is the main work of this paper. Each structure has its own virtuous characteristics thus the desirable characteristics are selected from each PUF then they are combined together to get the hybrid PUF structure. Mainly PUF structures are used as random number generator which should be same at all the generation times. This property makes the circuit suitable for secure cryptographic structure applications. In this paper hybrid ring oscillator structure is proposed for enhancing uniqueness and reliability. The experiments were conducted on Xilinx FPGA’s with the certain challenging set and produce unique response only for the concerned chip. In the experimental analysis, the proposed design increases the circuit complexity, but the power consumption seems to be same with the traditional designs.

Keywords

Hardware Security, Uniqueness, Random Number Generation, Intrinsic PUFs, IP Protection, IC Authentication.
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  • Implementation of a Hybrid Ring Oscillator Physical Unclonable Function

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Authors

N. Sivasankari
Department of Electronics and Communication Engineering, Mepco Schlenk Engineering College, India
A. Muthukumar
Department of Electronics and Communication Engineering, Kalasalingam University, India

Abstract


Developing a hybrid ring oscillator based Physical Unclonable Function (PUF) in FPGA is the main work of this paper. Each structure has its own virtuous characteristics thus the desirable characteristics are selected from each PUF then they are combined together to get the hybrid PUF structure. Mainly PUF structures are used as random number generator which should be same at all the generation times. This property makes the circuit suitable for secure cryptographic structure applications. In this paper hybrid ring oscillator structure is proposed for enhancing uniqueness and reliability. The experiments were conducted on Xilinx FPGA’s with the certain challenging set and produce unique response only for the concerned chip. In the experimental analysis, the proposed design increases the circuit complexity, but the power consumption seems to be same with the traditional designs.

Keywords


Hardware Security, Uniqueness, Random Number Generation, Intrinsic PUFs, IP Protection, IC Authentication.

References