ICTACT Journal on Microelectronics

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Controlling Ambipolar Current And Enhancement Of On-state Current With High And Low Concentration Source Pockets


Affiliations
1 Department of Electronics and Communication Engineering, National Institute of Technology, Goa, India
2 Department of Electronics and Communication Engineering, Indira Gandhi Engineering College, India
3 Department of Electronics and Communication Engineering, Madhav Institute of Technology and Science, India
4 Department of Electronics and Communication Engineering, Rewa Engineering College, India
     

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This paper proposes and investigates a new architecture of PNPN TFET by using 2-D ATLAS Device Simulation Software TCAD Tool. The source pocket plays a crucial role in increasing the ON-state current through Tunnel FET. In order to enhance the source pocket characteristics, the source pocket is divided laterally into high and low concentration source pockets without modulating its width (LP). This modification results in a reduction of tunnelling width (λ), thereby increasing the significant amount of lateral electric field and suppressing the horizontal electric field, which in turn enhances the tunnelling probability as well as tunnelling rate. This proposed structure is a promising candidate for getting higher ON-state current (Ion), higher current ratio (Ion/Ioff), lower threshold voltage (VT) and reduced steepness sub-threshold slope (SS). These parameters are calculated with respect to conventional PNPN TFET and hetero-dielectric BOX (HDB) PNPN TFET, which enable the device to be operated efficiently with lower power consumption.

Keywords

Band-to-Band Tunnelling (BTBT), Sub-Threshold Swing, Tunnelling Field-Effect Transistor (TFET), High-κ Dielectric, Hetero-Dielectric BOX (HDB)
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  • Controlling Ambipolar Current And Enhancement Of On-state Current With High And Low Concentration Source Pockets

Abstract Views: 159  |  PDF Views: 1

Authors

Sudhan Kumar
Department of Electronics and Communication Engineering, National Institute of Technology, Goa, India
Dheeraj Singh Rajput
Department of Electronics and Communication Engineering, Indira Gandhi Engineering College, India
Ritu Gupta
Department of Electronics and Communication Engineering, Indira Gandhi Engineering College, India
Sankalp Shukla
Department of Electronics and Communication Engineering, Indira Gandhi Engineering College, India
Deep Kishore Parsediya
Department of Electronics and Communication Engineering, Madhav Institute of Technology and Science, India
Vikash Sharma
Department of Electronics and Communication Engineering, Rewa Engineering College, India

Abstract


This paper proposes and investigates a new architecture of PNPN TFET by using 2-D ATLAS Device Simulation Software TCAD Tool. The source pocket plays a crucial role in increasing the ON-state current through Tunnel FET. In order to enhance the source pocket characteristics, the source pocket is divided laterally into high and low concentration source pockets without modulating its width (LP). This modification results in a reduction of tunnelling width (λ), thereby increasing the significant amount of lateral electric field and suppressing the horizontal electric field, which in turn enhances the tunnelling probability as well as tunnelling rate. This proposed structure is a promising candidate for getting higher ON-state current (Ion), higher current ratio (Ion/Ioff), lower threshold voltage (VT) and reduced steepness sub-threshold slope (SS). These parameters are calculated with respect to conventional PNPN TFET and hetero-dielectric BOX (HDB) PNPN TFET, which enable the device to be operated efficiently with lower power consumption.

Keywords


Band-to-Band Tunnelling (BTBT), Sub-Threshold Swing, Tunnelling Field-Effect Transistor (TFET), High-κ Dielectric, Hetero-Dielectric BOX (HDB)

References