Performance Analysis of Data Transfer from FPGA to PC

The FPGA is programmable digital logic chip. The Field Programmable Gate Array (FPGA) offers a flexible solution for transferring data obtained from hardware to a PC for analysis and storage. A serial interface is a simple way to connect an FPGA to a PC personal computer. An RS-232 serial interface is used to connect hardware to the PC. The RS-232 protocol is used to implement with minimum hardware support. However, the Universal Serial Bus (USB) protocol has largely replaced traditional RS-232 communications, mainly due to a higher data rate and ease of configuration. RS-232 communication uses voltage up to ±15V (some early specs even use ±25V). And it uses an inverse logic (high/true/1 is a negative voltage; low/false/0 is a positive voltage). These voltages are far too high for modern (and even older) computer logic. Here is two approaches compared to transfer the data from the FPGA to the PC. The first approach was to connect the FPGA with the PC using the RS-232 serial exchange protocol. This protocol achieved a data rate of 36.9 kbps, slightly above the required data rate. Data rates faster than 36.9 caused errors to be transmitted, regardless of extra added idle time in the end of each word for padding and synchronization.The second approach was to connect the FPGA with the PC using an USB interface. This approach achieved a data rate of 625 mbps by using USB 3.0 interfacing protocol. To increase the data rate yielded errors as well, although not as many. Synchronization was again the issue with higher data rates, due to pauses required to transfer data in the USB buffer. In this paper, models for the FPGA to send data in memory via USB 3.0 port and RS-232 port has developed, as well as programs on the PC to accept those data streams. On the transmitter end, ISE and Simulink system generator used to program the FPGA to send data. On the receiver end, MATLAB was used to program the PC to read the data.