Design of CMOS Digital Integrated Circuits Using MTCMOS

As power is always a critical issue in digital integrated circuits. For minimization of this power various methods using dynamic threshold voltage MOSFET for ultra-low power applications [1]. Chandel has done comparative analysis for 1 and 2 bit binary operand adder circuits [4]. Again, chandel has implemented low power technique in CMOS based flip-flop circuit [8]. In the various leakage power components is modelled and analysed [9]. And same model is utilized in various circuits for estimation of various parameters. Gate diffusion input technique has been used for designing various arithmetic circuits [13, 14]. An overview on low power design technique is detailed and leakage control transistor technique and multi-threshold technique implementation is detailed [16]. Optimum power concept is introduced is used in various digital circuits [15]. A new circuit technique is proposed in this research work MTCMOS using bulk bias. In order to maintain performance and a large enough gate overdrive, it is necessary to scale threshold voltages. By scaling the supply voltage and the threshold voltage, the increase in subthreshold leakage power is small as compared to the quadratic reduction in the dynamic power supply.