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The industries of the future, call for unprecedented flexibility whereas, the communication technology intervention is the best solution. For sustainable development goals in industry automation demand Dedicated Short-range Communication (DSRC) with Intelligent Transportation Systems (ITS). One of these systems' view point is the regular dissemination of safety messages. Integrating this technology with the existing Industry automation is a technical challenge. Integration also involves in imparting intelligence through digitalization of communication. With a cost of overhead power, Error Controlling Codes (ECC) provides a reliable and error-free DSRC communication system. In this paper, low power and secure digital VLSI architecture is presented to meet the sustainable integrated communication technology on chip circuitry for industry 4.0. The circuit's performance is measured in Cadence utilizing 18 nm FinFET-based ECRL adiabatic logic. The design provides maximum power savings of 99.49% over reported values for CMOS and 99.41% for pass transistor implementation. The adiabatic logic circuits constructed with ECRL are shown to have consistent peak current traces and hence can survive differential power analysis (DPA) attacks, resulting in improved circuit security.

Keywords

DSRC, Error Control, Hamming Code, Adiabatic Logic.
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