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Threshold Voltage Extraction of 220nm FDSOI Device using Linear Extrapolation Method


Affiliations
1 Electronics and Communication Engineering, Birla Institute of Technology, Mesra, Ranchi - 835215, Jharkhand, India
 

Objectives: The objective of this research article is to extract threshold voltage of fully depleted silicon on insulator (FDSOI) device@ gate length of 220 nm. Methods/Analysis: This paper aims at modeling of fully depleted silicon on insulator (FDSOI) device @ gate length of 220nm. This work finds threshold voltage of FDSOI device using linear extrapolation method. Findings: Threshold voltage of the device is found to be 0.21 V. For different gate voltages, drain current versus drain voltage characteristics curves are plotted in this paper. Novelty /Improvement: The modeled device is applicable in designing ultra-low power circuits which are useful in portable and wearable devices.

Keywords

Drain Current, Drain Voltage, FDSOI Device, Gate Voltage, Linear Extrapolation, Threshold Voltage.
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  • Threshold Voltage Extraction of 220nm FDSOI Device using Linear Extrapolation Method

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Authors

V. Karthik Reddy
Electronics and Communication Engineering, Birla Institute of Technology, Mesra, Ranchi - 835215, Jharkhand, India
M. Guduri
Electronics and Communication Engineering, Birla Institute of Technology, Mesra, Ranchi - 835215, Jharkhand, India
N. Lakshmi Dheshik Reddy
Electronics and Communication Engineering, Birla Institute of Technology, Mesra, Ranchi - 835215, Jharkhand, India
P. Dharani
Electronics and Communication Engineering, Birla Institute of Technology, Mesra, Ranchi - 835215, Jharkhand, India
S. Prasad
Electronics and Communication Engineering, Birla Institute of Technology, Mesra, Ranchi - 835215, Jharkhand, India
A. Islam
Electronics and Communication Engineering, Birla Institute of Technology, Mesra, Ranchi - 835215, Jharkhand, India

Abstract


Objectives: The objective of this research article is to extract threshold voltage of fully depleted silicon on insulator (FDSOI) device@ gate length of 220 nm. Methods/Analysis: This paper aims at modeling of fully depleted silicon on insulator (FDSOI) device @ gate length of 220nm. This work finds threshold voltage of FDSOI device using linear extrapolation method. Findings: Threshold voltage of the device is found to be 0.21 V. For different gate voltages, drain current versus drain voltage characteristics curves are plotted in this paper. Novelty /Improvement: The modeled device is applicable in designing ultra-low power circuits which are useful in portable and wearable devices.

Keywords


Drain Current, Drain Voltage, FDSOI Device, Gate Voltage, Linear Extrapolation, Threshold Voltage.



DOI: https://doi.org/10.17485/ijst%2F2016%2Fv9i40%2F125608