Indian Journal of Science and Technology

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High Performance Design of Elgamal Cyrptographic Algorithm using Vedic Mathematics


Affiliations
1 Department of ECE, Periyar Maniammai University, Thanjavur - 613403, Tamil Nadu, India
2 Department of ECE, Mailam Engineering College, Mailam – 604304, Tamil Nadu, India
3 Department of Mathematics, Periyar Maniammai University, Thanjavur – 613403, Tamil Nadu, India
4 Department of ECE, Jei Mathaajee College of Engineering, Siruvakkam - 631552, Tamil Nadu, India
 

Objectives: Vedic mathematics contains 16 formulae or Sutras. Employing these shortcut formulae in the computations of Elgamal cryptographic algorithm will reduce the logic elements, layout area and power consumption. Methods/Statistical Analysis: Simulation programming for the paper has been done through Verilog HDL code in MODELSIM software and performance parameters like speed, power etc., using XILINX software. Findings: In this paper, when employing these Vedic formulae, lesser number of logic elements are consumed when compared with conventional method. Improvements/ Applications: By investigating the various Sutras in Vedic mathematics, it has been observed that speed is increased and layout area is minimized.

Keywords

Elgamal Algorithm, Multiplier and Accumulate Unit, Urdhva Tiryagbhyam Sutra, Vedic Multiplier.
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  • High Performance Design of Elgamal Cyrptographic Algorithm using Vedic Mathematics

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Authors

S. Leonard Gibson Moses
Department of ECE, Periyar Maniammai University, Thanjavur - 613403, Tamil Nadu, India
S. Ganesan
Department of ECE, Mailam Engineering College, Mailam – 604304, Tamil Nadu, India
C. Vimala
Department of Mathematics, Periyar Maniammai University, Thanjavur – 613403, Tamil Nadu, India
I. Rabiya Begam
Department of ECE, Jei Mathaajee College of Engineering, Siruvakkam - 631552, Tamil Nadu, India
M. Nivetha Priya
Department of ECE, Jei Mathaajee College of Engineering, Siruvakkam - 631552, Tamil Nadu, India

Abstract


Objectives: Vedic mathematics contains 16 formulae or Sutras. Employing these shortcut formulae in the computations of Elgamal cryptographic algorithm will reduce the logic elements, layout area and power consumption. Methods/Statistical Analysis: Simulation programming for the paper has been done through Verilog HDL code in MODELSIM software and performance parameters like speed, power etc., using XILINX software. Findings: In this paper, when employing these Vedic formulae, lesser number of logic elements are consumed when compared with conventional method. Improvements/ Applications: By investigating the various Sutras in Vedic mathematics, it has been observed that speed is increased and layout area is minimized.

Keywords


Elgamal Algorithm, Multiplier and Accumulate Unit, Urdhva Tiryagbhyam Sutra, Vedic Multiplier.



DOI: https://doi.org/10.17485/ijst%2F2016%2Fv9i38%2F126679