Indian Journal of Science and Technology

The PDF file you selected should load here if your Web browser has a PDF reader plug-in installed (for example, a recent version of Adobe Acrobat Reader).

If you would like more information about how to print, save, and work with PDFs, Highwire Press provides a helpful Frequently Asked Questions about PDFs.

Alternatively, you can download the PDF file directly to your computer, from where it can be opened using a PDF reader. To download the PDF, click the Download link above.

Fullscreen Fullscreen Off


Today's mobile networks are moving towards creating base stations and mobile stations that are compatible with many standards simultaneously. One way of achieving it is to reconfigure and time multiplex the processing resources based on the present necessity. Field Programmable Gate Arrays have become one of the best choices for implementing digital signal processing and Software Defined Radio platforms due to advancements in VLSI over the past few decades. Partial Reconfiguration has regained its importance in the last decade and is the one of the best methodologies to implement an Software Defined Radio. This paper presents an implementation of physical layer specifications of IEEE 802.11g using dynamic partial reconfiguration on FPGA. The Orthogonal Frequency Division Multiplexing (OFDM) Physical layer is implemented with various encoding and modulation schemes to achieve different data rates. The design has been implemented in Xilinx Virtex-5 board.

Keywords

FPGA, IEEE 802.11g, OFDM, Partial Reconfiguration.
User