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Design and Implementation of Adders using Novel Reversible Gates in Quantum Cellular Automata


Affiliations
1 Mepco Schlenk Engineering College, Sivakasi - 626005, Tamil Nadu, India
2 Department of CSE, P. S. R. College of Engineering, Sivakasi - 626140, Tamil Nadu, India
 

Background/Objectives: The objective is to reduce the Quantum Cost (QC), Garbage Output (GO) and Gate Counts in the design of the adder by incorporating the Novel Reversible Gates. Methods/Statistical Analysis: In recent day's energy dissipation is the major complex problem in circuit designing in order to recede this problem the reversible logic is employed, where the input vectors can be derived from the output vectors and from the output vectors the input vectors can be procured. Using this technique the Quantum Cost, Garbage Outputs and Gate Counts of the design is reduced. Findings: Based on the technique of reversible logic a novel reversible Gates is proposed from that the novel reversible adders have been designed. The novel reversible gates satisfy the property of reversibility and universality which shows the uniqueness of the proposed gates. The comparative analysis have been made with the existing work, the proposed work shows a significant improvement in the design optimization parameters. Application/Improvements: The proposed structures can be employed in the ALU design and in Floating Point Multiplier design. The comparative analysis shows that Number of Gates, Garbage Outputs and Quantum Cost is minimum for the proposed gate based structure rather than conventional one

Keywords

Garbage Outputs (GO), QCA, Quantum Cost (QC), Reversibility, Reversible Logic, Universality
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  • Design and Implementation of Adders using Novel Reversible Gates in Quantum Cellular Automata

Abstract Views: 194  |  PDF Views: 0

Authors

A. Kamaraj
Mepco Schlenk Engineering College, Sivakasi - 626005, Tamil Nadu, India
P. Marichamy
Department of CSE, P. S. R. College of Engineering, Sivakasi - 626140, Tamil Nadu, India
S. Karthika Devi
Mepco Schlenk Engineering College, Sivakasi - 626005, Tamil Nadu, India
M. Nagalakshmi Subraja
Mepco Schlenk Engineering College, Sivakasi - 626005, Tamil Nadu, India

Abstract


Background/Objectives: The objective is to reduce the Quantum Cost (QC), Garbage Output (GO) and Gate Counts in the design of the adder by incorporating the Novel Reversible Gates. Methods/Statistical Analysis: In recent day's energy dissipation is the major complex problem in circuit designing in order to recede this problem the reversible logic is employed, where the input vectors can be derived from the output vectors and from the output vectors the input vectors can be procured. Using this technique the Quantum Cost, Garbage Outputs and Gate Counts of the design is reduced. Findings: Based on the technique of reversible logic a novel reversible Gates is proposed from that the novel reversible adders have been designed. The novel reversible gates satisfy the property of reversibility and universality which shows the uniqueness of the proposed gates. The comparative analysis have been made with the existing work, the proposed work shows a significant improvement in the design optimization parameters. Application/Improvements: The proposed structures can be employed in the ALU design and in Floating Point Multiplier design. The comparative analysis shows that Number of Gates, Garbage Outputs and Quantum Cost is minimum for the proposed gate based structure rather than conventional one

Keywords


Garbage Outputs (GO), QCA, Quantum Cost (QC), Reversibility, Reversible Logic, Universality



DOI: https://doi.org/10.17485/ijst%2F2016%2Fv9i8%2F131018