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Efficient Hardware Architecture of EEG Analyzer for Determining the Depressive Disorders


Affiliations
1 Department of Electronics and Communication System, Karpagam University, Coimbatore - 641021, Tamil Nadu, India
 

Background/Objectives: In this paper, economical hardware design of the Electroencephalography (EEG) is planned for deciding the depressive disorders. The goal of this paper is development of moveable device supported encephalogram analysis targeted at analysis of mental disorders. Methods/Statistical Analysis: We presented a modified architecture of the Power Spectral Density (PSD) and also Spectral Asymmetry Index (SASI) for depression detection. Finding: The proposed architecture of the PSD computation reduces the computational complexity and hardware requirement due to the adaption of the merging process. SASI algorithm reveals the disturbed state of the brain. Improvements/Application: The planned hardware design is meant victimization Field Programmable Gate Array (FPGA). This design is simulated and tested victimization VHDL and synthesized victimization Xilinx ISE fourteen.

Keywords

Electroencephalography (EEG), Field Programmable Gate Array (FPGA), Merging Process, Power Spectral Density (PSD), Spectral Asymmetry Index (SASI).
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  • Efficient Hardware Architecture of EEG Analyzer for Determining the Depressive Disorders

Abstract Views: 181  |  PDF Views: 0

Authors

S. Kalvikkarasi
Department of Electronics and Communication System, Karpagam University, Coimbatore - 641021, Tamil Nadu, India
S. Sairabanu
Department of Electronics and Communication System, Karpagam University, Coimbatore - 641021, Tamil Nadu, India

Abstract


Background/Objectives: In this paper, economical hardware design of the Electroencephalography (EEG) is planned for deciding the depressive disorders. The goal of this paper is development of moveable device supported encephalogram analysis targeted at analysis of mental disorders. Methods/Statistical Analysis: We presented a modified architecture of the Power Spectral Density (PSD) and also Spectral Asymmetry Index (SASI) for depression detection. Finding: The proposed architecture of the PSD computation reduces the computational complexity and hardware requirement due to the adaption of the merging process. SASI algorithm reveals the disturbed state of the brain. Improvements/Application: The planned hardware design is meant victimization Field Programmable Gate Array (FPGA). This design is simulated and tested victimization VHDL and synthesized victimization Xilinx ISE fourteen.

Keywords


Electroencephalography (EEG), Field Programmable Gate Array (FPGA), Merging Process, Power Spectral Density (PSD), Spectral Asymmetry Index (SASI).



DOI: https://doi.org/10.17485/ijst%2F2016%2Fv9i29%2F131781