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Minimalist 4-bit Processor Focused on Processors Theory Teaching


Affiliations
1 Technological Faculty, District University Francisco Jose de Caldas, Bogota D. C, Colombia
 

Objectives: To design and implement a totally-functional 4-bit didactic processor, in order to be applied as a tool for improving the learning process of students of microprocessors courses, and to be used as a base for future applications. Methods/Analysis: This work was reached through the application of a final course project in microprocessor and digital circuit courses, where it was given to the students via web platform, just the basic block diagram (to use Bottom- Up methodology) and they had to complete or design collaboratively the rest of details or blocks which is necessary to work. This processor was implemented using hardware description languages such as: Very fast speed Hardware Description Language (VHDL) and Verilog, on Complex Programmable Logic Device (CPLD) and Field Programmable Gate Array (FPGA). Findings: The present one is used as a teaching tool for digital circuits and microprocessor courses in the Technology Faculty of District University (Bogotá, Colombia). This minimalist design of the processor was done to reduce the amount of resultant digital gates, in order to implement inside a small digital programmable device. As a result, it was obtained as a simple processor to start with the basic concepts in the learning process of micro-processors and a little improvement of final exams results due to the involving of students into real problems as collaborative designers. Novelty/ Improvements: Reduced design is capable to implement on small CPLD or to be implemented sometimes on FPGA to do parallel applications. Additionally, its reduced size helps to easily understand it and implementing by the students.

Keywords

4-bit Processor, Didactic Processor, Finite State Machine, Harvard, RISC, VHDL, Verilog, Processor Design
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  • Minimalist 4-bit Processor Focused on Processors Theory Teaching

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Authors

Fernando Martínez Santa
Technological Faculty, District University Francisco Jose de Caldas, Bogota D. C, Colombia
Fredy H. Martinez Sarmiento
Technological Faculty, District University Francisco Jose de Caldas, Bogota D. C, Colombia
Holman Montiel Ariza
Technological Faculty, District University Francisco Jose de Caldas, Bogota D. C, Colombia

Abstract


Objectives: To design and implement a totally-functional 4-bit didactic processor, in order to be applied as a tool for improving the learning process of students of microprocessors courses, and to be used as a base for future applications. Methods/Analysis: This work was reached through the application of a final course project in microprocessor and digital circuit courses, where it was given to the students via web platform, just the basic block diagram (to use Bottom- Up methodology) and they had to complete or design collaboratively the rest of details or blocks which is necessary to work. This processor was implemented using hardware description languages such as: Very fast speed Hardware Description Language (VHDL) and Verilog, on Complex Programmable Logic Device (CPLD) and Field Programmable Gate Array (FPGA). Findings: The present one is used as a teaching tool for digital circuits and microprocessor courses in the Technology Faculty of District University (Bogotá, Colombia). This minimalist design of the processor was done to reduce the amount of resultant digital gates, in order to implement inside a small digital programmable device. As a result, it was obtained as a simple processor to start with the basic concepts in the learning process of micro-processors and a little improvement of final exams results due to the involving of students into real problems as collaborative designers. Novelty/ Improvements: Reduced design is capable to implement on small CPLD or to be implemented sometimes on FPGA to do parallel applications. Additionally, its reduced size helps to easily understand it and implementing by the students.

Keywords


4-bit Processor, Didactic Processor, Finite State Machine, Harvard, RISC, VHDL, Verilog, Processor Design



DOI: https://doi.org/10.17485/ijst%2F2017%2Fv10i14%2F151635