Indian Journal of Science and Technology

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Objectives: This paper presents a switched capacitor based dc to dc step down converter architecture to produce multiple output voltages with low ripple factor for the applications in wireless sensor nodes. The use of energy efficient non overlapping clock generators to minimize short circuit current has been presented. Methods: The proposed architecture consists of the integration of a capacitive ladder based dc to dc step-down converter with a non overlapping clock produced by a Constant Energy Ring Oscillator (CERO) instead of Current Starved Ring Oscillator (CSRO). The converter produces multiple output voltages as per the requirement of the oscillator. The switched capacitor consists of MOS Transmission gates as switches and the capacitors. All the simulations were performed in the 90nm technology by the Cadence Virtuoso simulator. All the switches in the DC-DC converter were implemented as transmission gates. Findings: A very low ripple voltage output was produced by the DC-DC converter. Its efficiency was found to be greater than 90% with a switching frequency of 500 MHz. Compared with the previous topologies, the number of transistors used was highly reduced. Improvements: A wide range of output voltage from 0.8V to 2.7 V was generated. The ripple voltages were as low as 0.02V at full load conditions.

Keywords

DC-DC, Ring Oscillator, Ripple Voltage, Switched Capacitor, Wireless Sensor Nodes (WSN)
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