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A 1.5V CMOS Transconductor Using Adaptive Biasing and its Application


Affiliations
1 Electrical Engineering Department, Mahshahr Branch, Islamic Azad University, Mahshahr, Iran, Islamic Republic of
 

A low-voltage CMOS transconductor is designed in 0.35μm standard CMOS technology. The proposed circuit uses adaptive biasing linearization method to achieve better linearity in low voltage applications. Simulation results using HSPICE show a total harmonic distortion of -71 dB at 1.25 MHz for a 400 mV peak to peak input voltage. The total power consumption is only 45 μW with 1.5 V power supply. The circuit can be used in the implementation of membership functions or fuzzifiers in analogue and mixed-signal neuro-fuzzy systems.

Keywords

Adaptive Biasing, High Linear, Low-voltage, Low-power, Transconductance, Fuzzifier
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  • Kachare M, Lopez-Martin A, Ramirez-Angulo J and Carvajal RG (2005a) A compact tunable CMOS transconductor with high linearity. IEEE Trans. Circuits & Systems-ІІ: EXPERESS BRIEFS. 52 (2), 82-84.
  • Kachare M, Ramirez-Angulo J, Carvajal RG and Lopez-Martin A (2005b) New low-voltage fully programmable CMOS triangular/trapezoidal function generator circuit. IEEE Trans. Circuits & Systems-І: REGULAR PAPER. 52 (10), 2033-2042.
  • Kuo-Chi Kuo and Leuciuc A (2001) A linear MOS transconductor using source degeneration and adaptive biasing. IEEE Trans. Circuits & Systems-ІІ. Analogue & digital signal processing. 48(10), 937-943.
  • Krummenacher F and Joehl N (1988) A 4-MHz CMOS continuous-time filter with on-chip automatic tuning. IEEE J. Solid-State. 23, 750-758.
  • Nedungadi A and Viswanathan TR (1984) Design of linear CMOS transconductance elements. IEEE Trans. Circuits & Systems. CAS-31(10), 891-894.
  • Ramirez-Angulo J, Sawant MS, Lopez-Martin A, Carvajal RG (2005) Compact implementation of high performance CMOS current mirror. Electr. Lett.41(10), 3–4.
  • Sanchez-Sinencio E, Ramirez-Angulo J and Linares Barranco B (1989) OTA-based nonlinear function approximation. IEEE J. Solid-State Circuits. 24(6), 1576–1586.
  • Sasaki M, Ishikawa N, Ueno F and Inoue T (1992) Current-mode analogue fuzzy hardware with voltage input interface and normalization locked Loop. IEICE Trans. E75-A(6), 650–654.
  • Thomsen A and Brooke MA (1993) A programmable piecewise-linear large-signal CMOS amplifier. IEEE J. Solid-State Circuits. 28(1), 84–89.
  • Van Valburg J and van de Plassche RJ (1992) An 8-bit 650-MHz folding ADC. IEEE J. Solid-State Circuits. 27(12), 1662–1666.
  • Worapishet A and Nephaphan C (2003) Currentfeedback source-degenerated CMOS transconductor with very high linearity. Electr. Lett. 39(1), 17-18.
  • Zadeh LA (1965) Fuzzy sets. Inf. Contr. 8. 338-353.

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  • A 1.5V CMOS Transconductor Using Adaptive Biasing and its Application

Abstract Views: 806  |  PDF Views: 130

Authors

Behzad Ghanavati
Electrical Engineering Department, Mahshahr Branch, Islamic Azad University, Mahshahr, Iran, Islamic Republic of
Mohsen Safaei Larki
Electrical Engineering Department, Mahshahr Branch, Islamic Azad University, Mahshahr, Iran, Islamic Republic of

Abstract


A low-voltage CMOS transconductor is designed in 0.35μm standard CMOS technology. The proposed circuit uses adaptive biasing linearization method to achieve better linearity in low voltage applications. Simulation results using HSPICE show a total harmonic distortion of -71 dB at 1.25 MHz for a 400 mV peak to peak input voltage. The total power consumption is only 45 μW with 1.5 V power supply. The circuit can be used in the implementation of membership functions or fuzzifiers in analogue and mixed-signal neuro-fuzzy systems.

Keywords


Adaptive Biasing, High Linear, Low-voltage, Low-power, Transconductance, Fuzzifier

References





DOI: https://doi.org/10.17485/ijst%2F2012%2Fv5i6%2F30465