Indian Journal of Pure and Applied Physics

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Low Power Non-Volatile 7T1M Subthreshold SRAM Cell


Affiliations
1 Department of Electrical Engineering, Jamia Millia Islamia, New Delhi-110 025, India
2 Department of E & C, Jamia Millia Islamia, New Delhi-110 025, India
 

A new modified 7T1M non-volatile SRAM cell is presented in this paper for low power applications at subthreshold voltage (very low voltage) simply by connecting the memristor directly with storage node which is acting as storage element and adding a transistor in between the two storage nodes with feedback connection gives better performance in terms of average delay, read /write operations and RSNM/WSNM. The memristor based circuits are simulated at subthreshold is a new insight and a new effort in technology made with improvement of approximately 61% and 23% of RSNM and WSNM respectively compared to existing memory cell 7T1M and power dissipation is decreased by 66% whereas read delay and write delay obtained is nominal. Moreover, It has also simulated an adjusting 6T2M and conventional 6T at subthreshold voltage i.e. VDD=0.3V to compare its stability behaviour at lower supply voltage.

Keywords

Memristance, Subthreshold, SRAM Cell, Memristor, Voltage Scaling, Stability, Power Dissipation.
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  • Low Power Non-Volatile 7T1M Subthreshold SRAM Cell

Abstract Views: 124  |  PDF Views: 81

Authors

Zeba Mustaqueem
Department of Electrical Engineering, Jamia Millia Islamia, New Delhi-110 025, India
Abdul Quaiyum Ansari
Department of Electrical Engineering, Jamia Millia Islamia, New Delhi-110 025, India
Md. Waseem Akram
Department of E & C, Jamia Millia Islamia, New Delhi-110 025, India

Abstract


A new modified 7T1M non-volatile SRAM cell is presented in this paper for low power applications at subthreshold voltage (very low voltage) simply by connecting the memristor directly with storage node which is acting as storage element and adding a transistor in between the two storage nodes with feedback connection gives better performance in terms of average delay, read /write operations and RSNM/WSNM. The memristor based circuits are simulated at subthreshold is a new insight and a new effort in technology made with improvement of approximately 61% and 23% of RSNM and WSNM respectively compared to existing memory cell 7T1M and power dissipation is decreased by 66% whereas read delay and write delay obtained is nominal. Moreover, It has also simulated an adjusting 6T2M and conventional 6T at subthreshold voltage i.e. VDD=0.3V to compare its stability behaviour at lower supply voltage.

Keywords


Memristance, Subthreshold, SRAM Cell, Memristor, Voltage Scaling, Stability, Power Dissipation.

References