Open Access Open Access  Restricted Access Subscription Access

Improving On-state current and Ambipolarity of TFET using Gate-Drain and Gate Dielectric Engineering


Affiliations
1 School of VLSI Design and Embedded Systems, NIT Kurukshetra, Haryana 136 119, India
2 Department of Electronics and Communication Engineering, NIT Kurukshetra, Haryana 136 119, India

This article presents the Gate Overlap on Drain with Hetero Gate Dielectric TFET (GDHD-TFET), a novel tunnel FET structure aimed at addressing the low ON current and ambipolar leakage observed in traditional TFETs. By investigating the combined effects of hetero gate dielectric and gate-drain overlapping, the GDHD-TFET offers a significant improvement in design compared with conventional TFET design. Unlike traditional approaches that focus solely on regulating the tunnel barrier widths at the channel-source junction, the GDHD-TFET simultaneously improves the tunnel barrier widths at both channel-source and channel-drain junctions. As a result, the GDHD-TFET achieves remarkable improvements in ON current and ambipolar conduction, surpassing traditional TFET performance by factors of 102 and 104, respectively. Furthermore, it maintains low subthreshold swing (SS) of 29.3 mV/dec indicating its potential for low-power applications.

Keywords

Ambipolarity; Gate overlapping; TFET; Tunnelling barrier width
User
Notifications
Font Size

Abstract Views: 71




  • Improving On-state current and Ambipolarity of TFET using Gate-Drain and Gate Dielectric Engineering

Abstract Views: 71  | 

Authors

Ganta Avinash
School of VLSI Design and Embedded Systems, NIT Kurukshetra, Haryana 136 119, India
Gaurav Saini
Department of Electronics and Communication Engineering, NIT Kurukshetra, Haryana 136 119, India

Abstract


This article presents the Gate Overlap on Drain with Hetero Gate Dielectric TFET (GDHD-TFET), a novel tunnel FET structure aimed at addressing the low ON current and ambipolar leakage observed in traditional TFETs. By investigating the combined effects of hetero gate dielectric and gate-drain overlapping, the GDHD-TFET offers a significant improvement in design compared with conventional TFET design. Unlike traditional approaches that focus solely on regulating the tunnel barrier widths at the channel-source junction, the GDHD-TFET simultaneously improves the tunnel barrier widths at both channel-source and channel-drain junctions. As a result, the GDHD-TFET achieves remarkable improvements in ON current and ambipolar conduction, surpassing traditional TFET performance by factors of 102 and 104, respectively. Furthermore, it maintains low subthreshold swing (SS) of 29.3 mV/dec indicating its potential for low-power applications.

Keywords


Ambipolarity; Gate overlapping; TFET; Tunnelling barrier width