Table of Contents
Vol 5, No 3 (2019)
Open Access
Subscription Access
Articles
Sinusoidal Power Clock Based PFAL | ||
Sagar Jain, Shubham Garg, Neeta Pandey, Kirti Gupta | ||
Vol 5, No 3 (2019), Pagination: 801-806 | ||
ABSTRACT | PDF | Abstract Views: 210 | PDF Views: 0 |
Arduino Microcontroller based Smart Dustbins for Smart Cities | ||
K. Suresh, S. Bhuvanesh, B. Krishna Devan | ||
Vol 5, No 3 (2019), Pagination: 807-814 | ||
ABSTRACT | PDF | Abstract Views: 239 | PDF Views: 0 |
Power Gated Technique to Improve Design Metrics of 6t Sram Memory Cell for Low Power Applications | ||
Hemant Kumar, Shikha Saun | ||
Vol 5, No 3 (2019), Pagination: 815-819 | ||
ABSTRACT | | Abstract Views: 201 | |
Error Compensation Technique for 90nm CMOS Fixed-Width and Area Efficient Booth Encoding Multiplier | ||
S. Ravindrakumar, V. M. SenthilKumar, S. Jayasri, D. Nithya, Jyotsna Siva | ||
Vol 5, No 3 (2019), Pagination: 820-824 | ||
ABSTRACT | PDF | Abstract Views: 197 | PDF Views: 0 |
Analysis of Surface Potential Model Developed for Ballistic Planar CNTFET Operated with CNT Diameter Variation | ||
S. Balaji Ramakrishna, A. R. Aswatha | ||
Vol 5, No 3 (2019), Pagination: 825-830 | ||
ABSTRACT | PDF | Abstract Views: 237 | PDF Views: 0 |
Framework for Parameter Extraction of Nonlinear Model for Mesfets and Implementation in Cad Tools | ||
Mandleshwar Kumar Mishra, K. Anitha Sheela | ||
Vol 5, No 3 (2019), Pagination: 831-835 | ||
ABSTRACT | PDF | Abstract Views: 195 | PDF Views: 0 |
Design and Analysis of Log Periodic Dipole Array Antenna | ||
Pooja Chopade, S. V. Gaikwad | ||
Vol 5, No 3 (2019), Pagination: 836-844 | ||
ABSTRACT | PDF | Abstract Views: 209 | PDF Views: 0 |