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Continuous downscaling of conventional MOSFETs suffers from various detrimental shortchannel effects (SCEs). A combination of novel device structures and material property improvement can overcome the SCEs in order to sustain the historical cadence of scaling. In this paper, a comprehensive analysis on the effect of downscaling in the performance of a novel gate-engineered Triple Material (TM) Surrounding Gate (SRG) Metal Oxide Semiconductor Field Effect Transistor (MOSFET) is presented. With the help of device simulator Silvaco ATLAS, the effect of variation of the radius (R) and the channel length (Lg) on the surface potential, the Electric Field and the drain current is reported in order to provide an enticement for future theoretical studies and experimental researches of the critical aspects of the gate-engineered surrounding gate MOSFET. Results indicate that a trade-off between gate length Lg and channel radius R is necessary to achieve higher immunity against SCEs with a lower OFF-state leakage current to find its usage in ultra low-power applications.


Nano-Scale MOSFET, SCEs, TCAD, SRG MOSFET, Triple Material Gate, Gate Engineering.
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