Vol 1, No 3 (2015)

Table of Contents

Vol 1, No 3 (2015)

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Articles

Gate Engineering of Double Gate In0.53Ga0.47As Tunnel FET
C. S. Praveen, Ajith Ravindran, Shajimon K. John, Susan Abe
 Vol 1, No 3 (2015), Pagination: 91-95
ABSTRACT |  PDF     Abstract Views: 348  |  PDF Views: 0
Behavioral Modelling of CMOSFETs and CNTFETs Based Low Noise Amplifier
Navaid Z. Rizvi, Rajesh Mishra, Prashant Gupta
 Vol 1, No 3 (2015), Pagination: 96-100
ABSTRACT |  PDF     Abstract Views: 379  |  PDF Views: 0
An Analysis to Design Merged Delay Transformed Iir down Sampler Filter:An Efficient down Sampler Filter Architecture
V. Soni, G. Parmar
 Vol 1, No 3 (2015), Pagination: 101-114
ABSTRACT |  PDF     Abstract Views: 405  |  PDF Views: 0
High Speed Online Fault Detection of 64-Bit Ripple Carry Adder Using Modified Modular Redundancy
Jisha M. Nair, C. Pradeep
 Vol 1, No 3 (2015), Pagination: 115-119
ABSTRACT |  PDF     Abstract Views: 341  |  PDF Views: 0
Case Study of Explicit and Implicit Pulsed Flip Flops with Conditional Pulse Enhancement Mechanism
Thara Sebastian, A. Aravindhan
 Vol 1, No 3 (2015), Pagination: 120-123
ABSTRACT |  PDF     Abstract Views: 306  |  PDF Views: 0
Analytical Modelling of Low Pressure Single Boss Sculptured Diaphragm and its Sensitivity Enhancement
D. Sindhanaiselvi, R. Ananda Natarajan, T. Shanmuganantham
 Vol 1, No 3 (2015), Pagination: 124-130
ABSTRACT |  PDF     Abstract Views: 373  |  PDF Views: 20
Pattern and Position Dependent Gate Leakage and Reduction Technique
K. S. Sreekala, S. Krishna Kumar
 Vol 1, No 3 (2015), Pagination: 131-135
ABSTRACT |  PDF     Abstract Views: 294  |  PDF Views: 0