Browse Title Index


 
Issue Title
 
Vol 8, No 1 (2022) Test Abstract
Abc C
 
Vol 8, No 1 (2022) The Construction And Performance Enhancements Of Ultra High-frequency Range For The Indoor And Outdoor Antennas In Built-in Communication Networks Abstract
J. Gowri, Indu Nair, Hari Hara Priyadharshini
 
Vol 7, No 3 (2021) The Efficient Implementation to Optimize Power and Delay Using Data Selector Abstract
Jogi Prakash, Biroju Ravi Kiran, Parvatham Sathish
 
Vol 8, No 1 (2022) The Enhancements In Storage Capacity And Long-term Data Retention Of Multidimensional Flash Memory In Modern Microcircuit Applications Abstract
Ajay Mathew
 
Vol 6, No 4 (2021) The Higher Mode Elimination in Microstrip Patch Antenna using Defected Microstrip Surface for Suppression of Cross Polarized Radiations and Improved Isolation Abstract
S. Poornima, S. Chandramma, Halappa Gajera
 
Vol 7, No 3 (2021) Trap Charges Induced Immunity in Dual Metal Gate (DMG) Junctionless Accumulation Mode (JAM) Nanowire FET (NWFET) Abstract
Deepak Kumar, Shamsher Singh
 
Vol 6, No 3 (2020) Ultra Low Power and Secure VLSI Architecture for Dedicated Short Range Communication Applications Abstract
Radha Kollipara, Venkata Nagaratna Tilak Alapati
 
Vol 4, No 1 (2018) Ultra-Low Power Voltage Reference Circuit Utilizing a Threshold Voltage Difference Between Two CNFETs Abstract
S. B. Rahane, A. K. Kureshi, G. K. Kharate
 
Vol 2, No 2 (2016) Unconventional and Optimized Measurement of Solar Irradiance in Bengaluru Using Photovoltaic Techniques Abstract
K. J. Shruthi, P. Giridhar Kini, C. Viswanatha
 
Vol 5, No 2 (2019) U-Slot Multiband Antenna with Pruned Edges for Wlan, Wi-Max, X and Ku Band Applications Abstract
Megha Shringi, Rajveer Singh, M. L. Meena
 
Vol 2, No 2 (2016) VDTA Based Grounded to Floating Admittance Electronically Converter Abstract
Jay Kumar, Girish Parmar
 
Vol 4, No 3 (2018) Verification And Comparison Of Performance Parameters For Folded Cascode Opamp At Deep Sub-Micron Levels Abstract
Saurabh Waykole, Varsha S. Bendre, A. K. Kureshi
 
Vol 5, No 2 (2019) VLSI Architecture for Error Detection and Correction Based on XOR Against Multiple Cell Upsets with Reduced Redundant Bits Abstract
V. Bhanumathi, M. Sunandini
 
Vol 2, No 1 (2016) VLSI Implementation of High Speed Area Efficient Arithmetic Unit Using Vedic Mathematics Abstract
K. N. Vijeyakumar, S. Kalaiselvi, K. Saranya
 
Vol 7, No 2 (2021) VLSI Usage of a Productive MBIST Architecture Utilizing RLFSR Abstract
K. Sivakami, P. Vijayalakshmi, J. Jaya
 
Vol 3, No 4 (2018) Whale Optimized PID Controllers for LFC of Two Area Interconnected Thermal Power Plants Abstract
R. Bhatt, G. Parmar, R. Gupta
 
201 - 216 of 216 Items First Previous 4 5 6 7 8 9