| Issue | Title | |
| Vol 3, No 7 (2011) | Global Chaos Synchronization of Li and Pan Chaotic Systems by Active Nonlinear Control | Abstract |
| V. Sundarapandian | ||
| Vol 3, No 4 (2011) | Global Chaos Synchronization of Liu-Su-Liu and Li Systems by Active Nonlinear Control | Abstract |
| V. Sundarapandian | ||
| Vol 3, No 3 (2011) | Global Chaos Synchronization of T and Liu-Chen-Liu Systems by Nonlinear Control | Abstract |
| V. Sundarapandian, R. Suresh | ||
| Vol 3, No 4 (2011) | Gradient Based Optimal Power Flow | Abstract |
| P. Ramachandran, R. Senthil | ||
| Vol 7, No 6 (2015) | GSM Based Remote Monitoring of Transformer Parameters | Abstract |
| Rahul Ranjan, Supratik Das, Ramesh P. Gupta, Rahul Srivastava, Vikas Kr. Sah, G. Pandisabareeswari | ||
| Vol 7, No 4 (2015) | Hardware Efficient Transceiver Microcell Architecture of USB 2.0 for High Speed Data Communication Using FPGA | Abstract |
| Zessha Mishra, Anil Kumar Sahu | ||
| Vol 4, No 7 (2012) | Hardware Implementation of Fast Transversal Least Mean Square Algorithm in Acoustics, Speech, and Signal Processing (ASSP) Using TMS320C5X Processor | Abstract |
| J. Jebastine, B. Sheela Rani | ||
| Vol 3, No 10 (2011) | Harmonics Reduction in Multilevel Inverter Systems | Abstract |
| K. Gaayathry | ||
| Vol 9, No 2 (2017) | Harmonizing Mechanism for Power Saving and Delay Reduction in LTE Networks using DRX | Abstract |
| P. Arunagiri, G. Nagarajan | ||
| Vol 5, No 3 (2013) | HCCB Data Encoding and Decoding Data from Mobile | Abstract |
| R. Kaviarasi, K. Suganya, S. Anitha | ||
| Vol 3, No 6 (2011) | High Level Synthesis of Data Flow Graphs Using Integer Linear Programming | Abstract |
| S. Anbuyazhini, D. S. Harishram | ||
| Vol 2, No 9 (2010) | High Speed Area Efficient VLSI Structure for Real Time Image Computing | Abstract |
| V. P. Abithamol, E. P. Sumesh, R. Vidhyalavanya | ||
| Vol 4, No 5 (2012) | High Speed Low Power Viterbi Decoder using M-Algorithm | Abstract |
| P. Sangeetha, J. Muralidharan | ||
| Vol 2, No 10 (2010) | High Speed Parallel Butterfly Architecture for Computing Circular Convolution Based on FNT Using Modulo 2n+1 Partial Product Multiplier | Abstract |
| B. Hemalatha, K. Ashok Babu, S. Pothalaiah | ||
| Vol 3, No 1 (2011) | Higher Order Neural Networks Learning by Extended Kalman Filter | Abstract |
| Agya Mishra, R. N. Yadav, D. K. Trivedi | ||
| Vol 2, No 10 (2010) | Human Computer Interactions using Adaptive Speech-Text-Speech Conversions | Abstract |
| B. Kanisha, G. Balakrishanan | ||
| Vol 9, No 1 (2017) | Human-Computer Interaction | Abstract |
| G. Satyavathy, M. RachelBlessie | ||
| Vol 3, No 1 (2011) | Hybrid Approach for Routing in Clustered DTNS with Multiple Message Ferrying | Abstract |
| M. Govindaraj | ||
| Vol 10, No 2 (2018) | Hybrid Land Ploughing Tractor | Abstract |
| K. Dhivya, S. Darffini, M. Yogaraj, N. Nandha Kumar, S. Hari Prasath | ||
| Vol 5, No 6 (2013) | IFIR Filters with Improved Efficiency for Filter Banks and Trans Multiplexers | Abstract |
| Jyotsna Ogale, Alok Jain | ||
| Vol 5, No 2 (2013) | Impact of Higher-Order Dispersion and Phase Modulation on the Performance of alCNRZ Modulation for OWDM/DWDM | Abstract |
| Rupanjali Banerjee, Manjit Singh, Kuldeep Sharma | ||
| Vol 6, No 5 (2014) | Implementation & Performance of Different Adaptive Filtering Algorithms for Speech Enhancement | Abstract |
| Kapil Belpatre, M. R. Bachute, R. D. Kharadkar | ||
| Vol 3, No 7 (2011) | Implementation of 8 Bit Ripple Carry Adder and Serial Adder Using Clocked Adiabatic Logic | Abstract |
| N. Vinothkumar, V. Vignesh, S. Ravi | ||
| Vol 3, No 3 (2011) | Implementation of Adaptive Noise Canceller in Digital Filter for Various Applications | Abstract |
| Swati S. Godbole, Sanjay B. Pokle | ||
| Vol 10, No 6 (2018) | Implementation of Grain Sorting System Using Raspberry Pi | Abstract |
| Anita M. Jadhav, Makarand N. Kakatkar | ||
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